1. Field of the Invention
The present invention relates to a pattern evaluation method, a manufacturing method of a semiconductor device, a correction method of a mask pattern and a manufacturing method of an exposure mask.
2. Related Art
In recent years, an OPC (optical proximity correct) or PPC (process proximity correct) can be the to be a technology indispensable to a lithography process for manufacturing of a semiconductor device. The OPC is a technology to carry out a correction on a mask beforehand by estimating deterioration of fidelity of an optical pattern when transferring a pattern from the mask to a resist film on a semiconductor wafer. On the other hand, the PPC is a technology to carry out a correction on a mask beforehand by estimating not only optical deterioration but also deterioration of pattern fidelity when a film to be processed on a semiconductor wafer is processed from a resist pattern. When a wiring pattern is taken as an example, in a line-and-space type pattern with a pattern width A and an inter-wiring space B, the PPC changes the width of the inter-wiring space B with respect to different peripheral environments such as wiring width A, measures how the wiring width A changes with a variation in the space B and corrects dimensions of the mask pattern so that the same wiring width is obtained for all inter-wiring spaces B.
In the case of a hole pattern as well as the above described wiring pattern, data to correct dimensions of the mask pattern is obtained by measuring dimensions of an inter-hole structure while changing the length of the inter-hole structure. In this technology, it is important to accurately estimate in what dimensions a pattern on a mask in an arbitrary size is formed on a resist film or film to be processed. Generally, it is possible to realize a large amount of electrical measurement of dimensions of a wiring pattern using a 4-terminal circuit and corrections have been realized with high accuracy so far.
In the case of a hole pattern, dimensional measurement using an SEM (Scanning Electron Microscope) is in the mainstream. However, measurement using the SEM is not suitable for a large amount of dimensional measurement, and therefore there is a problem that it is difficult to perform high accuracy and speedy corrections compared to a wiring pattern. There is a proposal on a method of electrical measurement of a hole pattern (see Patent Document 1). However, according to the method disclosed in Patent Document 1, it is necessary to form holes similar to holes to be measured for a power supply and voltage measurement. Therefore, when the aim is dimensional measurement for the aforementioned OPC or PPC, it is necessary to provide an environment similar to that of the holes to be measured also for holes for a power supply and voltage measurement. This would cause even hole patterns unnecessary for measurement to be formed on wiring, resulting in a problem that the accuracy of measurement deteriorates.